Semiconductor RFIC Design Engineer

F A S T is developing what would be the world s first alldigital SBand radar chipset a homegrown UAE ITARfree capability The RFIC Engineer will own the chiplevel design from schematic to GDSII and drive the programme through tapeout Key Responsibilities Design RF mixedsignal ICs for SBand radar transceivers in nm nm RFCMOS or BiCMOS processes Own circuit blocks LNA PA mixer PLL VCO ADC DAC interface circuits Lead schematic capture layout and postlayout simulation in Cadence or equivalent EDA tools Manage tapeout submissions MPW shuttle selection and wafer testing Coauthor patent applications for novel circuit topologies Work with the RF systems team to meet SBand radar transceiver specifications Required Qualifications MSc or PhD in Microelectronics Electrical Engineering or VLSI Design 3 years RFIC or mixedsignal IC design experience Handson Cadence Virtuoso or equivalent experience with TSMC or similar CMOS processes Understanding of Sparameter characterisation noise figure linearity metrics IIP3 P1dB Skills Bonus Differentiators Prior microwave IC MMIC design at 2 4 GHz bands Experience with radaronchip architectures or phasedarray IC design Publication record or copatents in RF circuit design